CISUC

On-line Signature Learning and Checking: Experimental Evaluation

Authors


Cited by

Year 2006 : 2 citations

 Roshan G. Ragel, "Architectural Support for Security and Reliability in Embedded Processors?, PhD thesis, The University of New South Wales, Austrália, 2006

 Roshan G. Ragel, Sri Parameswaran, "Embedded security and reliability: Hardware assisted pre-emptive control flow checking for embedded processors to improve reliability?, Proceedings of the 4th international conference on Hardware/software codesign and system synthesis CODES+ISSS '06, October 2006.

Year 2005 : 2 citations

 Amir Rajabzadeh, Seyed Ghassem Miremadi, "A Hardware Approach to Concurrent Error Detection Capability Enhancement in COTS Processors?, in Proc. Of 11th IEEE International Symposium Pacific Rim Dependable Computing, PRDC2005, Changsha, Hunan, China, December 2005

 João Paulo Dias da Rosa, "Implementação de um pré-processador assembly para detecção de erros de fluxo de controle através da técnica CFCSS?, Tese de fim de curso, Pontifícia Universidade Católica do Rio Grande do Sul, Brasil, 2005

Year 2004 : 1 citations

 A. A. Rajabzadeh, SGA Miremadi, MA Mohandespour, "Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features?, Journal of Electronic Testing, 2004

Year 1997 : 1 citations

 C520. Uwe Wildner "CASC - Compiler Assisted Self-Checking of Structural Integrity" Tese de doutoramento, Institut für Informatik, Universität Potsdam, Rep. Federal da Alemanha, Outubro 1997